 | ASIC Design Eng 4 - Apple - Austin — Austin
Location: Austin, Texas, USA
Company: Apple Verification language such as Specman, SystemVerilog, Verilog/VHDL\nExpertise with various HDL simulators and waveform viewers like NCSIM, ModelSim, VCS, DVE, Verdi\nPerl, Shell scripting, Makefiles, TCL\nGood knowledge of Computer Architecture, General Purpose Microprocessor and Memory sub-system micro-architecture\nExperience defin... | Oct-23 |
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